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Go back Latest commit @1801BM1 1801BM1 vm80a: revengineered Intel 8080A microprocessor ... 323535a Jul 12, 2019 vm80a: revengineered Intel 8080A microprocessor Update readme.md DE1 initial commit AX309 Initial Commit Wishbone completed and tested Clock moderator added Wishbone registered output Interrupt awakening from halt corrected Relocating large files to LFS Add die photo Update readme.md Signed-off-by: Viacheslav Ovsiienko <1801BM1@gmail.com> 323535a Git stats * 2 commits Files Permalink Failed to load latest commit information. Type Name Latest commit message Commit time img vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 org vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 sch vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 tst vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 wbc vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 .gitattributes vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 clean.bat vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 license.md vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 readme.md vm80a: revengineered Intel 8080A microprocessor Jul 13, 2019 View code readme.md Die photo Die photo Links to raw photos (please, note, files are LARGE): * Top metal, 11Kx10K, 95M * Top metal, 11Kx10K, 140M * Diffusion, 5.5Kx5K, 28M Abstract The vm80a is the core built on the base of the revengineered real 580BM80A die. The 580BM80A chip is the Soviet replica of early Intel i8080A microprocessor, and these ones are very close topologically. The silicon techology parameters are: * 5 micron scale * one metal and one polycrystalline silicon layer * NMOS schematics with depletion mode loads * the extra high voltage source (+12V) is required * high voltage direct clock phases (+12V) * no built-in negative bias generator, extra negative voltage source is required The reversing was performed in the following stages: * crystall decapsulation (with hot acid etching) * taking the panorama shapshot of combined upper metal and polysilicon layers * etching upper metal and polysilicon layers * taking the panorama shapshot of diffusion layer with the prints of polysilicon layer * vectorizing the photos in the SprintLayout editor * transferring the topology to the PCAD-2004 pcb editor * converting topology to PCAD-2004 schematics using the back annotation * writing the Verilog code on the precise schematics base * patching the code to eliminate the asynchronous nature of original circuits * simulating and testing the resulting vm80a core on the real FPGAs * thorough i8080 exerciser tests were passed successfully Results The project provides two i8080 models in Verilog - the one is pin-compatible with original processor and other is refactored to be implemented within SoC and has the Wishbone interface. Both approaches are proven on the real boards and FPGAs. The models are compact and fast enough, the typical speed and area for Wishbone-featured model on the DE0 board (Cyclone EP3C16F484C6): * 104MHz clock, 607 LUTs and 187 flip-flops, no RAM blocks Directory structure \sch * topology in Sprint Layout format * topology in PCD-2004 pcb format * schematics in PCD-2004 sch format * schematics in pdf (gate level) \org * synchronous vm80a core, all original timings are kept intact, includes the wrapper for usage as in-place-substitution of real i8080/580BM80A \wbc * Wishbone compatible version of vm80a core, uses single clock, FPGA-optimized, follows the original command execution timings \tst * i8080 Exerciser test software and some other tests Supported FPGA development boards: * Altera DE0 * Altera DE1 * Altera DE2-115 * Alinx AX309 About i8080 precise replica in Verilog, based on reverse engineering of real die Topics verilog microprocessor reverse retrocomputing i8080a schematics fpga 8080 cpucore retro Resources Readme License View license Releases No releases published Languages * Verilog 59.9% * Assembly 25.8% * Stata 13.7% * Other 0.6% * (c) 2020 GitHub, Inc. * Terms * Privacy * Security * Status * Help * Contact GitHub * Pricing * API * Training * Blog * About You can't perform that action at this time. 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