[HN Gopher] How the bootstrap load made the historic Intel 8008 ...
___________________________________________________________________
How the bootstrap load made the historic Intel 8008 processor
possible
Author : ink_13
Score : 57 points
Date : 2020-10-24 16:47 UTC (6 hours ago)
(HTM) web link (www.righto.com)
(TXT) w3m dump (www.righto.com)
| analog31 wrote:
| Very interesting. Some now-obsolete audio power amplifier IC's
| used a bootstrap method to increase output swing. But I never
| imagined it being used in a microprocessor!
| egsmi wrote:
| It's also very common in switching power supplies as it allows
| N-type devices to be used in the high side improving efficiency
| for "high" output current supplies. Here is an excellent
| summary of the various techniques.
|
| https://www.onsemi.com/pub/Collateral/AN-6076.pdf.pdf
| kens wrote:
| Author here for all your 8008 questions :-)
| h2odragon wrote:
| Thanks for going to such lengths to share your joy with us.
| egsmi wrote:
| I love these posts and I could probably ask a thousand
| questions. I'll constrain myself to just... a couple. :)
|
| Does the 8008 get ground internally or does the IO just drive
| Vdd (-9V) as the low level? The data sheet you linked to has no
| min for Vol so I am guessing that it does but it seems like
| that would make interfacing to peripheral ICs kind of annoying
| (assuming TTL levels). All the pinouts I found online [1] have
| no ground pin so I must be missing something obvious, right?
|
| [1] http://www.cpu-galerie.de/html/intel8008-m8008.html
| pwg wrote:
| You can grab a copy of the 8008 User Manual here:
|
| https://www.manualslib.com/manual/943056/Intel-8008.html
|
| The 'download' link works, after possibly answering a google
| image captcha.
|
| On pdf page 2 the "features" says the I/O lines are TTL
| compatible.
|
| On pdf page 15 begins the "electrical specifications"
| section, and it looks like they just pull the outputs down
| against Vdd with a MOS transistor (see "Output Buffer"
| diagram in figure 7).
| egsmi wrote:
| Thanks! The pin out on page 2 has no ground, so what are
| they pulling down to? That's my question. I can imagine a
| couple of ways to do make the TTL levels so I'm curious
| which way it was actually done.
| pwg wrote:
| According to the diagram of the output buffer on pdf page
| 15, they pull down against Vdd (the negative supply).
| What is left unstated is that the pulldown transistor has
| likely been designed with a Vt such that when "on", and
| pulling down against Vdd, the output goes quite close to
| zero volts.
| egsmi wrote:
| It just dawned on me that you could use the Vol=Vdd-Vt
| property of the inverter to level shift up the IO output
| closer to ground. Especially if one did a circuit that did
| Vol=Vdd-2Vt one could get a low output that's pretty close to
| ground. Is that what they did?
| kens wrote:
| The output pins are pulled to Vdd (-9) by a transistor
| driven by a bootstrap load circuit. So you'll lose one
| threshold voltage, not two. (You can see these bootstrap
| load capacitors in the die photo near the pads.)
|
| Inconveniently, the 8008 datasheet doesn't specify how low
| the low outputs are; it just says they are at most 0.4
| volts.
| egsmi wrote:
| Thanks for the information. It so cool that you can just
| examine the die and know the answer.
|
| There are definitely trade offs to consider so I can
| understand why the Intel engineers took that route.
|
| On the one hand, one gets a very negative output level,
| which I suppose no one really cares about in the 70s so
| maybe that's not even a disadvantage. But to level shift
| more toward ground would consume more die area per IO and
| increase the output impedance of the pin, unless one did
| another buffer stage, which would be even more die area.
|
| It's interesting how we can just absorb this extra
| complexity in modern circuits without even batting an
| eye. It's barely even considered as extra complexity.
| kens wrote:
| It's a bit tricky. From the 8008's perspective, it's running
| on -14 volts. But the 8008's Vcc (i.e ground) is connected to
| +5V, and the Vdd is connected to -9V. So when the 8008
| outputs a 1 (high), the output is +5V (more or less), which
| is TTL-compatible. When the 8008 outputs a 0 (low), the
| output will be negative. Apparently, TTL is fine with
| negative input voltages, so this is acceptable.
|
| The point is by shifting the 8008's supply to +5V/-9V and
| ignoring ground, the outputs automatically work with TTL.
| egsmi wrote:
| Interesting, I thought TTL didn't like voltages that were
| too negative but I'm definitely not too great on the
| historical stuff.
|
| This data sheet for 7400 logic, which admittedly only goes
| back to 1983, doesn't like inputs below -1.5V
|
| That could very likely be because ESD protection was added
| and 1970 TTL parts didn't have that.
|
| https://www.jameco.com/jameco/products/prodds/910901.pdf
| userbinator wrote:
| Due to the threshold voltage, the low will be quite close
| to 0V. A TTL input is the emitter of a transistor, so
| trying to pull it slightly negative won't do any harm; and
| if anything, may actually help the transition be a bit
| sharper:
|
| https://en.wikipedia.org/wiki/Transistor%E2%80%93transistor
| _...
| myself248 wrote:
| In "The diagram below shows the bootstrap load circuit.", you
| use Q1/Q2/Q3 designations but these aren't labeled in the
| diagram.
|
| Also can you explain a little more about the "load resistor
| (which is actually a transistor)"? It looks like this is
| actually a current sink or something?
| kens wrote:
| Thanks for letting me know! I've updated the diagram with the
| right version.
|
| Yes, the transistor is a current sink. Since the gate is
| wired to Vdd, the transistor is stuck on so it provides a
| fixed current limited by its size. Transistors are much
| smaller than resistors on an IC so they used transistors
| instead of resistors.
| a1369209993 wrote:
| > Yes, the transistor is a current sink. Since the gate is
| wired to Vdd, the transistor is stuck on so it provides a
| fixed current limited by its size.
|
| That seems wrong? Q3 appears to be effectively acting as a
| diode with cathode fixed at -9V and a 5V threshold, such
| that Q2's gate (Q3's anode) can never be above -4V, but
| will be pulled lower by the capacitor if `out` drops. (At
| which point Q3 doesn't provide any current because its
| anode is down at -18V.)
| kens wrote:
| I was answering the question about the load transistor in
| the earlier inverter diagram, not Q3. I mention Q3's
| diode action in footnote 5.
| justin66 wrote:
| Amazing stuff, as always.
| klelatti wrote:
| Another fantastic post! Just one minor point for anyone just
| browsing the title - bootstrap loads were of course also used in
| 4004 which preceded the 8008.
|
| Bootstrap loads get a mention in Federico Faggin's presentation
| on the 4004 at the 35th anniversary CHM presentation - it's a
| really interesting and engaging talk.
|
| https://www.youtube.com/watch?v=j00AULJLCNo&t=26m0s
|
| I think it's reasonably clear without bootstrap loads and the
| other innovations that Dr Faggin pioneered then Intel wouldn't
| have had the early lead in the microprocessor market which they
| were able ultimately to convert in a dominant position with x86.
___________________________________________________________________
(page generated 2020-10-24 23:00 UTC)