[HN Gopher] ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin...
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ESP32-C3 WiFi and BLE RISC-V processor is pin-to-pin compatible
with ESP8266
Author : zdw
Score : 153 points
Date : 2020-11-22 15:56 UTC (7 hours ago)
(HTM) web link (www.cnx-software.com)
(TXT) w3m dump (www.cnx-software.com)
| Rebelgecko wrote:
| I wonder how power consumption is? Power power use (especially
| when sleeping) is probably my main complaint with the ESP boards
| I've used
| baybal2 wrote:
| Hope it went for the better if the core is a hard macro. As far
| as I heard, they didn't change the process.
| willemmerson wrote:
| There are plenty of esp32 boards with 10-20uA deep sleep
| current, how low do you want it?
| Rebelgecko wrote:
| Mind pointing me in the right direction? The ones I have are
| more like 10-20 __m __A (maybe that 's a side-effect of
| having USB on board? I'm not really an expert, I just want my
| battery powered stuff to last months instead of days)
| willemmerson wrote:
| https://www.ezsbc.com/product/esp32-feather/
|
| https://www.crowdsupply.com/unexpected-maker/tinypico
|
| https://www.olimex.com/Products/IoT/ESP32-S2/ESP32-S2-DevKi
| t...
| punnerud wrote:
| Dupe: https://news.ycombinator.com/item?id=25168302
| nrp wrote:
| Espressif is no longer alone in the ultra low cost hobby WiFi SoC
| space. Pine has started working with the Bouffalo BL602 which
| seems to be a fairly similar RISC-V powered part:
| https://www.cnx-software.com/2020/10/28/the-quest-for-a-blob...
|
| It will be interesting to see which one gains critical mass in
| community use.
| 4778468d wrote:
| It's all about the software & documentation.
|
| There's lots of "competitors" to esp32, pretty much none of
| them except STM have the software for developers, which makes
| their offerings close to useless.
|
| The only way to gain critical mass is relentless deep
| commitment to developer tools/libraries and documentation.
|
| In many cases these competitors actually try to hide their
| documentation and keep secret how their chips work.
|
| I'd be interested to hear if there's other chip vendors with
| software/documentation as impressive as Espressif but I haven't
| heard any, except as I said STM.
| snvzz wrote:
| >stm
|
| gd32v is a stm32 (peripherals, memory map) clone, except
| using risc-v rather than arm.
| phkahler wrote:
| That is going to put a dent in ARMs revenue. Even if that
| particular chip isn't a big seller, it means ST now has a
| drop-in replacement for ARM in their other SoCs. Soon
| people will realize that ISA is often irrelevant, but the
| peripherals, libraries, and tools are.
| ducktective wrote:
| I'm not so sure. About ISA there is this :
| https://news.ycombinator.com/item?id=24958423
| ckocagil wrote:
| That's not ST, it's by the Chinese company GigaDevice
| that makes (decent) clones of the STM32 series. Your
| point still stands though.
| londons_explore wrote:
| It just means it isn't made for hobbyists... Hardware
| companies don't care about the lack of good software - they
| just pay some embedded code monkey a lowish salary to 'just
| make it work'.
| ducktective wrote:
| "embedded code monkey"
|
| Is this really the case? :(
| AlotOfReading wrote:
| It's a pretty uncharitable description, but yeah. There
| are only two types of companies that do this though:
| companies where they're working at such a scale that
| spending a few extra months to years of developer time
| doesn't make a dent compared to the BOM savings. You're
| more likely to get vendor support by name recognition at
| these kinds of companies, so it's not as bad as the
| hobbyist experience. The second kind is where either the
| project or the company can't afford the capital outlay
| for better documented chips (or support packages). Stay
| the heck away from these if you value your sanity or know
| your own worth.
| ducktective wrote:
| Is it even possible to make as much as the hype fields
| (webdev, data science, ML) in embedded? Is there
| opportunities for startups in HW sector?
| AlotOfReading wrote:
| If you're doing automation of some kind in the bay,
| embedded has roughly comparable payscales to other dev
| jobs. Beyond that, no. You'll generally be paid slightly
| less than webdevs (but still far more than most engineers
| make).
| plasticchris wrote:
| Starting out no, but there is plenty of demand for
| experienced people. If you don't have experience then
| build up a portfolio.
| londons_explore wrote:
| Sadly no - apart from a very tiny number of silicon
| valley companies, everyone else in embedded tech seems to
| pay the people who write verilog and assembly the same as
| the people who make the schematics and the mechanical
| designs. That's sometimes only 40% of what people who
| write python and nodejs get in the same city...
| Ericson2314 wrote:
| Your best bet is anti-trust:
|
| Basically, if there more customers but smaller orders,
| the wasteful overhead of customers reverse engineering
| the produce will grow. But then there's more incentive
| for HW companies to overtake the competition by offering
| better docs.
| baybal2 wrote:
| > Is there opportunities for startups in HW sector?
|
| Yes, but certainly not in the Western hemisphere.
| nrp wrote:
| Bouffalo apparently has been giving Pine64 the necessary
| documentation access to make their initiative for a full open
| software stack workable:
| https://www.pine64.org/2020/10/28/nutcracker-challenge-
| blob-...
|
| Edit: a better reference is Bouffalo's GitHub org showing the
| docs and mostly open code: https://github.com/bouffalolab
| baybal2 wrote:
| RISC-V so far is a turndown for a design, speaking honestly.
|
| ARM have by faaaaar the best tooling in the industry, which
| are more open, than not, and the baseline is made on GNU
| toolchain, only with more fancy debug tools being paid/locked
| down.
|
| RISC-V did not yet benefit from its openness for as long as
| tooling go.
|
| However, RISC-V would still be infinitely better than
| Cadence, and them wanting $100k for a basic (and terrible)
| debugger with coresight-like functionality.
| canada_dry wrote:
| > gain critical mass is relentless deep commitment to
| developer tools/libraries and documentation
|
| Which seems (IMHO) why the likes of Texas Instruments has
| failed. They've made a few attempts at jumping on the IoT
| bandwagon over the last decade and should have been in a
| perfect position to capitalize on the huge uptake but it just
| didn't fit their profit margin goals I'm guessing.
| taf2 wrote:
| Agreed having recently bought an esp32 s2 board it does not yet
| have platform io support so I put the board aside and figure
| I'll come back to it in 6 months and see if that is updated.
| ducktective wrote:
| To my understanding, PlatformIO is (merely) a set of scripts
| to handle multiple toolchains and HALs in a consistent way.
| In esp32-s2 case, it means integrating ESP-IDF only. What
| stops you from directly invoking cmake using the ESP-IDF?
| taf2 wrote:
| Just time. I only just started learning how to use Arduino
| this past summer and discovered I could platformio with a
| Makefile this fall - it's been pretty cool so far. I will
| probably spend sometime later learning Esp-idf next
| ducktective wrote:
| Just recently, Bouffalo Lab introduced BL602 which is a RISC-V
| WiFi-BLE chip with ESP8266 price. I guess Espressif had other
| plans for the competition!
|
| [1] https://news.ycombinator.com/item?id=24877335
|
| [2] https://news.ycombinator.com/item?id=24916086
|
| Skimming over C3 datasheet, it seems it doesn't have DAC but has
| one I2S. BL602 has DAC but no I2S!
| noodlesUK wrote:
| I'd love to see a similar hobby-oriented chip that supported
| Thread as well. It's a low power IPv6 networking stack that's
| designed for connected home automation.
| Avamander wrote:
| Sounds like the Bouffalo BL602 and BL604 that were recently
| revealed. Competition in this sector is very interesting, I hope
| the Espressif chip will be as open or even more open than the
| Bouffalo chip.
| robertely wrote:
| It lists `USB Device` as well. This could be a really accessible
| device for building hybrid usb/bt devices, like wireless
| keyboards.
| penagwin wrote:
| 2$ wifi bad usb anyone?
| ducktective wrote:
| It seems it only supports CDC and some JTAG mode. For keyboards
| and such, the USB stack should support HID which doesn't seem
| to be the case here. In other words, they've implemented a USB
| 1.1 FS stack just so far to make intermediary USB2UART chips
| like FTDI and CP2102 redundant.
| meekrohprocess wrote:
| Nice. The XTensa cores always felt weird.
|
| Too bad they only included the I/M/C extensions - no floats,
| vectors, or atomics. And USB would be nice (nevermind, it has USB
| :D).
|
| But it's still very exciting. Maybe there'll be less conflict
| between ARM/XTensa/PIC32/etc. cores in the coming years.
| azdle wrote:
| > And USB would be nice.
|
| The block diagram show "USB Device" in the peripherals block.
| meekrohprocess wrote:
| Oh yeah, cool - I missed that.
|
| Finally! An Espressif chip with WiFi, Bluetooth, _and_ USB!
| Scaevolus wrote:
| Why do you need atomics on a single core device?
| meekrohprocess wrote:
| Interrupts and exceptions can happen at any point in a
| program's execution on a microcontroller, and they are free
| to modify memory and peripheral registers.
|
| >Load <register>
|
| >Modify register in memory
|
| >>Interrupt happens and changes <register>
|
| >Write incorrect value back to <register>.
|
| These sorts of bugs can be pernicious to debug, and they are
| easy for novice developers to create.
| yjftsjthsd-h wrote:
| That's horrifying. What _is_ the fix /mitigation if you
| don't have proper atomics? I can't see how to properly
| avoid that.
| unwind wrote:
| Obviously interrupt code can't clobber registers like
| that, any shared register the ISR needs to share with
| ordinary code must be saved/restored on entry/exit
| somehow.
| loeg wrote:
| I think GP is talking about MMIO or some device register
| rather than the CPU's register file.
| loeg wrote:
| You implement higher-level abstractions like mutexes. On
| a single core device this could be as simple as masking
| interrupts. You can use the mutexes to avoid the
| described race.
| meekrohprocess wrote:
| You can disable interrupts when modifying locking
| primitives, and save/restore the CPU context when
| interrupts are entered/exited. You can also minimize the
| amount of changes that any interrupt handler can make
| within the interrupt context.
|
| It's not really that bad, and plenty of microcontrollers
| lack atomic operations.
| phkahler wrote:
| Only communicate in one direction. I write, you read. I
| can also provide a large coherent set of data so long as
| you dont read it until I mark it as ready. There are many
| other ways too.
| monocasa wrote:
| You just guard those sequences by disabling and
| reenabling interrupts around them. It's a very common
| pattern in systems not designed for SMP.
| stefan_ wrote:
| Because you are likely still running a preemptive
| multitasking operating system.
| praseodym wrote:
| There are ESP32 variants with a dual-core Xtensa processor
| (https://en.wikipedia.org/wiki/ESP32).
| baybal2 wrote:
| I believe the problem was XTensas not being available in hard
| macros, or at least Chen will not sell them at a price point a
| mortal can afford.
|
| That's a huge thing when power efficiency, and operation from
| battery mattered.
| ed25519FUUU wrote:
| > _Pricing will also be similar to ESP8266._
|
| How can they possibly sell these chips at these prices? This is
| impossibly cheap. You can't even accuse them of trying to flood
| and control the market because they already own the market!
| pjc50 wrote:
| I'm not sure people realize how cheap small chips are that
| aren't on the bleeding edge of the process.
| ampdepolymerase wrote:
| You are seeing economies of scale (and cheap labour) in action.
| drcross wrote:
| And people have the gall to badmouth capitalism from the
| comfort of their Ikea couch on their Iphone.
| renw0rp wrote:
| what market are you talking about? hobby projects market?
| that's for sure, but that's not where the big money is.
| corty wrote:
| consumer goods with builtin wifi like switchable lightbulbs,
| remote-controlled extension cords, etc are often esp32 plus a
| relais on the IO pins.
| gsich wrote:
| The "smart" home market. ESP chips are heavily used there.
| makapuf wrote:
| This is really nice, riscv plus Wifi and BT will be a dream for
| hackers provided the chip and firmware is well documented. The
| datasheet is also in the comments
| (https://mega.nz/file/nk41mSAL#R_d0njlKRb-aIoGuX6JXUB5eeflAdy...
| )(chinese pdf) : 160MHz 400k sram apparently single core.
| kanwisher wrote:
| Some reason this didn't work, someone made an English
| translation https://mega.nz/file/4VRGgLzK#YIzeMvj_Z-
| LayxY8KztL4WiifcmQYc...
| codetrotter wrote:
| The comment parent to yours had a closing parentheses and
| stuff after the link that broke it.
|
| The link for the Chinese pdf is
| https://mega.nz/file/nk41mSAL#R_d0njlKRb-
| aIoGuX6JXUB5eeflAdy...
| makapuf wrote:
| Good catch, corrected.
| fulafel wrote:
| What will networking be like from SW POV?
| MrBuddyCasino wrote:
| The PDF is encrypted.
| kanwisher wrote:
| This is pretty awesome, ESP32s were great little Arduino nodes
| with wifi. Having an open architecture should open up more
| software. They previously had their own cpu arch
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