[HN Gopher] TSMC: SoIC
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TSMC: SoIC
Author : blopeur
Score : 119 points
Date : 2020-11-28 11:41 UTC (11 hours ago)
(HTM) web link (3dfabric.tsmc.com)
(TXT) w3m dump (3dfabric.tsmc.com)
| blopeur wrote:
| Whats, Whys and Hows of TXMS-SoIC :
| https://3dfabric.tsmc.com/english/dedicatedFoundry/technolog...
|
| Papers :
|
| * https://ieeexplore.ieee.org/document/8811194
|
| * https://ieeexplore.ieee.org/document/8776486
| ajarmst wrote:
| Whoa! Blew through my marketing gibberish budget less than one
| paragraph in.
| skohan wrote:
| Is there a risk in one manufacturer seemingly getting so far
| ahead in terms of being able to deliver high-performance
| processors?
| [deleted]
| Razengan wrote:
| What would the alternative be?
|
| Slowing all progress down so everyone can keep up?
| [deleted]
| mlindner wrote:
| Intel was there. If a company gets far ahead then they start to
| rest on their laurels and then competitors catch back up. It's
| cyclical.
| fibers wrote:
| each iterative cycle requires exponentially more r&d, making
| it prohibitive for that one firm to catch up
| virtue3 wrote:
| I think what hurt intel in the long run was actually their
| fully integrated stack.
|
| They couldn't really sell fab time to other companies cuz
| they didn't have a good attempt at fabbing for 3rd parties.
| So they were only fabricating intel chips, that's not nearly
| as big of a business as TSMC. So basically, TSMC can keep
| their last 3+ gens of fabs open and making product, while
| intel couldn't really reap any benefit from keeping old
| process nodes open.
|
| AMD made a good call selling off global foundries when it was
| apparent they couldnt keep up with Intel even.
|
| I think the really rough issue here is what happens if China
| does try to take Taiwan (and this is not unrealistic as China
| has been more aggressive towards them recently).
|
| TSMC is now a strategic asset for the USA. We've been
| attempting to get them to build a fab in the states for
| exactly this reason.
| sroussey wrote:
| Intel fanning for themselves is more than twice the
| business of TMSC fanning for many others.
|
| https://www.extremetech.com/computing/317769-intel-tops-
| semi...
| ENOTTY wrote:
| Intel fabs plenty of stuff at the 22 nm node, including
| chipsets for their CPUs[1], RF and other analog uses[2],
| novel RAM technologies, and their Lakefield/Foreveros
| thing. Given Intel's expanding product portfolio, there's
| likely additional internal customers for older nodes.
|
| [1]: https://www.tomshardware.com/news/intel-14nm-
| shortage-h310c,...
|
| [2]: https://ieeexplore.ieee.org/document/9075914
| petra wrote:
| Is that enough volume to cover all of their older , and
| large, fab capacity ? i'm not so sure.
| wmf wrote:
| Intel has a large number of fabs and I think capacity is
| reallocated over time; for example, a 22nm fab might be
| converted to 10nm to adapt to changing demand. They can
| eventually get down to just one 22nm fab which won't
| require as much demand to fill.
| AtlasBarfed wrote:
| What hurt Intel was missing the mobile CPU boat. If Intel
| wasn't so braindead in management, they probably could have
| won a substantial segment of mobile.
|
| Because of mobile, TSMC had so much revenue to advance
| their process and catch/surpass Intel. Heck, Apple's M1 is
| probably due to the same reason in the Apple ecosystem,
| they couldn't win the iPhone either, and IIRC various
| "what's wrong with Intel" threads stated many of the best
| Intel engineers went to Apple.
| baybal2 wrote:
| > Because of mobile, TSMC had so much revenue to advance
| their process and catch/surpass Intel.
|
| Intel never been chasing pure revenue. They were always
| conscious of their profitability, to please sock market
| analysts.
| AtlasBarfed wrote:
| Agreed, that's what happens when the MBAs infect your
| company.
|
| Same with Medtronic, a medical engineering company gets
| overridden with MBAs and now the only innovation they do
| is acquiring other companies.
| aaronblohowiak wrote:
| I've been told it helps protect Taiwan from prc aggression
| through its allies dependency on the fabrication continuing.
| justicezyx wrote:
| Like the myth that China's GFW is to protect local business,
| this is just retrospective fairytale.
|
| TSMC succeeded because of the chip and high-quality talents
| on the island. It was not setup to become a high-value
| precious.
|
| And the logic also easily break down, if anyone bother to
| think about the consequence. I.e., put a high-value target in
| a contended geographical location, just makes the conflict
| more desirable for the aggressor.
|
| Sure the protector would be more concerned if the target is
| lost, but the value of acquiring that target suddenly becomes
| way more attractive, in comparison to the potential loss to
| the protectors.
| DSingularity wrote:
| The value of the target is probably irrelevant. What
| matters is probability of success. Any Chinese will be
| decided by expected loses and gains. This is probably why
| IS continues to arm Taiwan as it is the biggest deterrent.
| justicezyx wrote:
| I am replying to the idea that TSMC is setup to be
| valuable to US, such that Taiwan get more protection.
| naringas wrote:
| I wish all this technology were more accesible. but they gotta
| protect their trade secrets (I guess...).
|
| I've heard about something called 'dycryl process' (in chip
| photolitography) but it is not the kind of info that it's easily
| found, nor easily understood even if I could google for it.
| MangoCoffee wrote:
| >I wish all this technology were more accesible. but they gotta
| protect their trade secrets (I guess...).
|
| open source their manufacturing process? everyone can get EUV
| machine and all the components to make chip. you figure out the
| better yield part or packaging like TSMC
| valusr wrote:
| They could give you all the recipes and steps, but a newcomer
| isn't going to make it due to the needed experience and
| expertise.
| intricatedetail wrote:
| It is like national security matter and relatively inexpensive
| when talking about nation's budget scale. Why countries don't
| make their own chips? Should this be in the realm of public
| companies just like healthcare or energy in some countries?
| ajnin wrote:
| Too bad they chose a name already taken by another very well
| established IC packaging technology :
| https://en.wikipedia.org/wiki/Small_outline_integrated_circu...
| magicalhippo wrote:
| SOIC is the external package though, not sure it'll be that
| confusing as many chips are typically packaged in many
| different packages.
| The_rationalist wrote:
| Could this be used for the next generation of HBM?
| baybal2 wrote:
| Not much. HBM will not gain much from going inside the chip
| pachage over existing interposer solution.
| machinelabo wrote:
| M1 chip has a bog standard Package-on-Package architecture -
| there is nothing special about it. The CoWoS and other 3D
| packaging technologies from TSMC's marketing pages aren't on the
| M1 chip. I believe there isn't even a silicon interposer due to
| cost presumably [1]. It is substrate on top of substrate (PoP) to
| connect the memory and CPU. CPU+GPU are on the same die which is
| pretty remarkable (Intel's IGPUs have been on the same die as
| well albeit they're not as powerful as M1s graphics) but that's
| somewhat unrelated to the packaging.
|
| Here is a good diagram (sans the silicon interposer):
| https://www.researchgate.net/figure/3D-stacked-DRAM-example-...
|
| Btw, memory has been stacked like that for a decade or more. Used
| to be stacked + wirebonded. But now, we have through-silicon vias
| (TSVs). The reason you can stack memory like that are many, one
| of them being thermals / power density.
|
| [1] https://www.youtube.com/watch?v=t6KUnC-oU5g
| imbusy111 wrote:
| I assume keeping the parts cool becomes a big issue. You get
| twice the amount of heat to dissipate within the same area. Or is
| there some workaround?
| nynx wrote:
| The work around would be microfluidic coolers, which aren't
| production ready yet, I believe.
| ksec wrote:
| No Workaround AFAIK, the idea right now is not to stack
| _compute_ die on top of each other but other things like SRAM
| or parts that uses little energy for both cost and space
| efficiency.
| neolefty wrote:
| The goals here are kind of sideways from heat dissipation.
|
| * Different parts from different processes -- for example DRAM
| and CPU need different processes, so it doesn't work to put
| them on the same chip -- this integration is a step closer than
| on-package.
|
| * Yield -- if you _really_ want sixteen cores, and you 're
| pushing the edge of your process, your yield for perfect eight-
| core chiplets will be dramatically better than for a sixteen-
| core chip or chiplet.
|
| But yeah concentrating all that into multi-chip chip will also
| concentrate the heat.
| baybal2 wrote:
| > Or is there some workaround?
|
| Synthetic diamonds, heatspreaders in the package
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