[HN Gopher] The Libre-SOC Hybrid 3D CPU [pdf] ___________________________________________________________________ The Libre-SOC Hybrid 3D CPU [pdf] Author : ksec Score : 32 points Date : 2021-02-06 18:46 UTC (4 hours ago) (HTM) web link (fosdem.org) (TXT) w3m dump (fosdem.org) | spijdar wrote: | I might be missing something, but this seems awfully light on any | real technical details, beyond "we intend to use this tech to | create the HDL to make the chip with", and some rather high level | strategic goals for the chip. Is there any work to show yet? | | Glancing through the source repos, it looks like there's a decent | amount of code written, so why not mention it or what it's doing | so far? It looks at least somewhat non-trivial, so surely there's | at least a basic demonstration. | lkcl wrote: | we're a rather small technically-focussed team, 80% of us with | Asperger's (!). right now, we can either focus on making the | site look pretty, or we can focus on "getting it done". | | if you'd like to see what was done up until around Nov 2020, | i've a video of the first boot of the litex BIOS | https://www.youtube.com/watch?v=72QmWro9BSE for example. | however what would be really helpful would be offers of | assistance. we've got funds available, so that's not a "we're | looking exclusively for volunteers" thing | | second answer: there appears not to be very much to show for it | because we had to stop actual "development" work and do several | months of planning on the Vectorisation system. however we | couldn't start that unless we had a full and proper | understanding of OpenPOWER, which was why we first had to do a | basic OpenPOWER v3.0B core, and that's what's demo'd in the | video. | | hope that helps. | dvh wrote: | Speaking of 3D chips. We live in 3D world but our chips are | mostly 2D. Yeah I know there are layers but overall the chip is | flat slab. | | If we wanted to simulate 2D world in hardware, we could do it | very efficiently on our CPUs and it would be infinitely scalable | (assuming the world interacts mostly locally). | | Here comes the interesting part: if we live in a simulation ran | by higher-dimensional beings, we have to transform our physics | into a form that would reveal some inherent dimension-ness of our | physics, then if we find this number, the beings live in a world | with one more dimension. | | So for example if our physics seems to be 10 dimensional, the | beings live in 11 dimensional world and their CPUs are 10 | dimensional. They designed our physics to be only 10 dimensional | so that they can run it efficiently on their CPUs. | [deleted] | monocasa wrote: | There's a lot of red flags, from NIH HDL generator language, to | using an OoOE core for GPU tasks, to suggesting that you don't | talk to your lawyer in the NLNet FAQ. | | Wish them the best though, love to see as much libre silicon as | possible. | robert_foss wrote: | migen is a very popular HDL in the Open Source FPGA space. | MrRadar wrote: | Robert Baruch on Youtube is building a (relatively simple) | RISC-V CPU core using nMigen and it looks like a very nice | tool to work with relative to other HDLs I've seen (though | I've never had to actually use an HDL myself before so I may | not be the best judge). Here's a playlist of the video | series, with the earlier videos basically being an | introduction to nMigen: https://www.youtube.com/watch?v=YgXJf | 8c5PLo&list=PLEeZWGE3Pw... His use-case is a bit unusual in | that his ultimate target is discrete ICs instead of an FPGA, | but he's using it to do formal verification of his core | before he commits the time to building the schematics and | laying out the PCBs. | monocasa wrote: | At best, it's like the fourth or fifth most popular language | among hobbyists not looking to tape out their designs (is | there a single nMigen design that's been taped out?). | | This would be be (by orders of magnitude?) the most complex | design attempted in the language, which pushes it into NIH | territory. ___________________________________________________________________ (page generated 2021-02-06 23:00 UTC)