[HN Gopher] Cheri C/C++ Programming Guide [pdf]
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       Cheri C/C++ Programming Guide [pdf]
        
       Author : mzs
       Score  : 70 points
       Date   : 2022-01-24 16:41 UTC (6 hours ago)
        
 (HTM) web link (www.cl.cam.ac.uk)
 (TXT) w3m dump (www.cl.cam.ac.uk)
        
       | MaxBarraclough wrote:
       | Briefly discussed August 2020:
       | https://news.ycombinator.com/item?id=24114402
       | 
       | To restate my comment from that thread: here's the CHERI project
       | home-page, which may be more approachable than the paper:
       | 
       | https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/
        
         | transpute wrote:
         | The Cheri-QEMU emulator is available for experimentation,
         | https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/cheri...
        
       | monocasa wrote:
       | Very recent related conversation concerning the recent CHERI
       | development systems:
       | 
       | https://news.ycombinator.com/item?id=30007474
       | 
       | https://news.ycombinator.com/item?id=30007354
        
       | erwincoumans wrote:
       | CHERI (Capability Hardware Enhanced RISC Instructions) extends
       | conventional hardware Instruction-Set Architectures (ISAs) with
       | new architectural features to enable fine-grained memory
       | protection and highly scalable software compartmentalization.
        
         | cbsmith wrote:
         | Alternatively, you could say it brings good ol' tagged memory
         | architectures back from the dust bin of history. ;-)
        
           | transpute wrote:
           | We may see Arm's MTE (memory tagging extensions) [1] on 2022
           | Apple SoCs
           | 
           | [1] https://community.arm.com/arm-community-
           | blogs/b/architecture...
        
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       (page generated 2022-01-24 23:03 UTC)