[HN Gopher] Universal Chiplet Interconnect Express UCIe 1.0 Laun...
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       Universal Chiplet Interconnect Express UCIe 1.0 Launched
        
       Author : ksec
       Score  : 41 points
       Date   : 2022-03-03 09:05 UTC (13 hours ago)
        
 (HTM) web link (www.servethehome.com)
 (TXT) w3m dump (www.servethehome.com)
        
       | [deleted]
        
       | MBCook wrote:
       | While not mentioned in the article, and also obviously not using
       | the new standard, Apple has been putting multiple dies on a
       | single package too lately haven't they? Isn't that how RAM is
       | done on the various M-series chips?
        
         | neogodless wrote:
         | > putting multiple dies on a single package
         | 
         | This part isn't new, or why this is significant. For example,
         | AMD has been doing this since Zen 2 (Ryzen 2xxx), combining
         | 14nm and 7nm components.
         | 
         | On the other hand, the top chip designers and foundries working
         | together and standardizing is potentially very significant,
         | though I reserve judgement until actual products are produced
         | on this new standard.
        
         | ksec wrote:
         | They are not. It is the same as how you normally put the DRAM
         | together just inside the same package. It is called System in
         | Package. The same way as Apple has done for their Apple Sx Chip
         | on Apple Watch for years.
        
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       (page generated 2022-03-03 23:00 UTC)