[HN Gopher] A Chip to Bridge the USB 2 - USB 3 Divide
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A Chip to Bridge the USB 2 - USB 3 Divide
Author : zdw
Score : 65 points
Date : 2022-03-07 18:25 UTC (4 hours ago)
(HTM) web link (hackaday.com)
(TXT) w3m dump (hackaday.com)
| StillBored wrote:
| The unstated is that the core problem here (lack of USB2 on a
| USB3 connector) is _NOT_ standard. This is generally only a
| problem on the plethera of shit arm/etc SoCs using garbage IP
| where the vendor is only interested in checking a box, than
| actually providing a working/compliant implementation of the
| specification.
|
| Part two of this problem are the USB2 implementations that don't
| provide USB1 Transaction Translators (TT), so keyboards/etc won't
| work.
|
| And as a 3rd note, the Pi4 actually has good USB3 because its
| implemented by a 3rd party XHCI controller like one might find on
| a random PCIe card. Combined with a usb3 hub with multiple TT's
| it should be possible to attach a number of SDR's etc at
| reasonable rates. Good luck figuring this out from the usb3 hub
| details unless it lists the chip its using.
| de_Selby wrote:
| >The unstated is that the core problem here (lack of USB2 on a
| USB3 connector) is _NOT_ standard.
|
| It does say this at the end of the article.
| cma wrote:
| >Good luck figuring this out from the usb3 hub details unless
| it lists the chip its using.
|
| Any recommended hubs with the right chip?
| MayeulC wrote:
| > the core problem here (lack of USB2 on a USB3 connector)
|
| Not sure if that's the core issue here? That's one of the
| issues, but there are more uses for that chip, like the
| introduction that hints at sharing USB3 bandwidth between
| multiple USB2 devices.
| rektide wrote:
| usb4 still preserves a legacy usb2 connection pair.
|
| on the one hand it's kind of absurd. on the other, a long
| distance capable, supported everywhere wire protocol is great to
| be able to assume. displayport's aux channel is a great example
| of why keeping legacy connectivity around on a second track: it
| makes lowhgrade kvm like connectivity ultra easy & low cost.
| it's, ultimately, a pretty good thing that the 480mbit/s pipe is
| available for use by cheap & common devices. i dont see what else
| we could do.
|
| (aside from mandate that each usb-4 hub integrate a usb-2 over
| usb-4 adapter like this on each port, which probably makes sense,
| but also probably would be uncertifiable, would be likely to
| cause some random device misbeaviors... whitequark will probably
| have found a dozen random constraints by the end of the week to
| this chip.)
| mikepurvis wrote:
| How wild is it that 480 Mbit/sec is low speed and low cost?
|
| Like, it makes sense on one level, but it's just crazy to me
| how fast that still is compared with PS2 (16kbps), RS232
| (115kbps), CANbus (1Mbps), USB 1.1 (12Mbps), 10/100 Ethernet
| (100Mbps), Firewire (400Mbps).
|
| Obviously totally inadequate once you're talking to solid state
| storage or if there's video/display data in the mix. But
| still... 480Mbps is fast.
| Dylan16807 wrote:
| That kind of mess, but worse, is what thunderbolt used to do.
| It would cut off USB signals (2 _and_ 3) when the port switched
| modes, and downstream USB support depended on pcie- >usb chips.
|
| https://www.reddit.com/r/UsbCHardware/comments/mjz2pu/usb4_a...
| MayeulC wrote:
| > displayport's aux channel is a great example of why keeping
| legacy connectivity around on a second track: it makes
| lowhgrade kvm like connectivity ultra easy & low cost
|
| On this topic, I wish it was used a bit more.
|
| What do you mean with that? Do you actually tunnel keyboard and
| mouse data trough that aux channel? I am not aware of it being
| supported by any OS? Or are you only referring to DCC data,
| using it to switch inputs? (Which you can also do on HDMI and
| VGA screens).
|
| If there is any alternative to HDMI CEC on the DisplayPort
| side, I'm all ears. That and standardized audio support are
| features where HDMI currently stands out, IMO.
| kevin_thibedeau wrote:
| This behavior is already done to translate 1.5 and 12Mbps
| packets into 480Mbps. USB 1.1 didn't do that and 1.5Mbps data
| effectively stole bus time from higher speed traffic.
| teruakohatu wrote:
| Reading the comments, apparently the Valve Index uses one of
| these chips. Supply is so bad nobody is selling this chip.
| ridgered4 wrote:
| > if you have a USB 3 hub plugged into a USB 3 port, multiple USB
| 2 devices plugged into it still cannot break through the USB 2
| uplink limit of 480 MBps.
|
| I had a weird project where I ran into this. Or rather, I was
| actually aware of it and tried to work around it. I wanted to
| attach a large number of optical drives with sata to USB
| converters to a single port, basically a hot attachable ripping
| tower kind of thing. To assure a single port would provide enough
| bandwidth I needed USB 3.0 throughout. But SATA to USB 3.0
| converters that exist seem to have...shaky support for optical
| drives as they're only really meant for SSDs/HDDs. My project
| ended in at least temporarily failure due to that unreliability.
|
| I remember reading about this device and not finding it a
| reasonable solution. In addition to not being easily available,
| I'd need one device per port to break the uplink limit. That
| wouldn't save me any money and it would be a cabling nightmare.
| If the chips were a reasonable price and easily available I might
| have looked into it more seriously anyway though.
| R0b0t1 wrote:
| There's a bunch of weirdness. Lack of USB2 to USB3 translation
| is one of them, but there's also a lack of USB3 and USB2
| concurrency.
|
| E.g., if I put a USB 2 device on a bus with a USB 3 flash drive
| I would find constant stalling due to the USB2 bus activity. It
| even went so far that the output of `lsusb -t` would show the
| speed downgraded to 480Mbps at the bus level and not just the
| port. This has since been changed, but I notice stalling and
| bad performance. This is supposed to be fixed in USB3.1 and 3.2
| but I am not sure we're going to see it in practice. The
| original spec does not say they are supposed to happen at the
| same time but the spec authors have made themselves clear that
| they were supposed to operate concurrently.
| MayeulC wrote:
| Maybe you'd have more chance using USB 3 drives directly,
| unless you actually require a 3.5 inches form-factor? Another
| option might be to use IDE drives...
| marktangotango wrote:
| > USB 2 uplink limit of 480 MBps.
|
| That should be "Mbps", usb 2.0 max is 60 megabytes per second.
| Odd that even hackaday gets this wrong from time to time.
| OJFord wrote:
| > Odd that even hackaday gets this wrong from time to time.
|
| Is it? Isn't 'hackaday' just various unvetted user
| contributions?
| blip54321 wrote:
| My pet peeve are webcams. You can only plug in a few before you
| run out of bandwidth.
| stathibus wrote:
| In my biased opinion USB 2 fallback is a misfeature. Most devices
| that use USB 3 for a good reason do terrible things when run at
| USB 2 speed, and it requires expertise to figure out why things
| aren't going the way they're supposed to.
|
| On the other hand a mouse and keyboard will work pretty much the
| same...
| rektide wrote:
| thatcs not what this chip is for/does. from the second
| paragraph:
|
| > _If you have a USB 2.0 device and a host with only USB 3.0
| signals available, this chip is for you._
| vlovich123 wrote:
| The main problem I've observed with fallback is that 3.0
| devices plugged into 3.0 ports sometimes get detected as 2.0
| devices. Sometimes there's a spontaneous port disconnect and
| the reenumeration causes it to be detected as USB2.0.
|
| If I recall correctly this was primarily only happening with a
| non-standard optical repeater cable so it could be the cable
| was doing something unexpected (eg 3.0 enumeration was taking
| longer than some timeout and it was going into 2.0 mode).
|
| In general though users preferred functionality, even if
| performance was reduced.
| a9h74j wrote:
| A USB2 to USB3 divide? Curse you, social media.
|
| If only there were a chip to bridge other divides.
| mschuster91 wrote:
| I ran into a similar problem when trying to extend a Mac Pro 4.1
| with a USB-C/Thunderbolt card and an USB-C to 4x USB-A hub on my
| desk. High speed USB devices like a HDD worked just fine - but my
| mouse and keyboard did not. The reason took me a while to find
| out: These "add Thunderbolt"-style cards carry only a USB3/TB PHY
| and pass USB2 D+/D- right through to a connector which you are
| supposed to plug into your motherboard's onboard USB connector.
|
| I was just thinking "wtf, who invented _this_ madness... are you
| serious? "... also, how much money would it have cost Intel to
| put in an USB2 PHY into the TB chipset? A couple cents maybe...
| that's just bonkers.
| dijit wrote:
| Semi-related: Is it possible to monitor USB hub bandwidth in a
| meaningful way?
|
| The only time I've ever noticed bottlenecks is when things
| stopped working, or work intermittently, and sometimes informs
| (via kernel messages) that USB is overloaded... but it strikes me
| odd that we have top/iftop/radeontop/intel_gpu_top/etc but I'm
| not aware of _anything_ for monitoring USB hubs.
|
| EDIT: well crap, I guess I never looked; there exists USBTop:
| https://github.com/aguinet/usbtop -- leaving my stupidity so
| others may learn.
| R0b0t1 wrote:
| You might get more useful things from /sys/kernel/debug as
| well, but you'll need to get familiar with the spec. It would
| let you know how a device is doing something wrong and can be
| made better.
| amelius wrote:
| Wireshark can read USB communication.
| wanderer_ wrote:
| I love me some packet-sniffing fun!
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(page generated 2022-03-07 23:00 UTC)