[HN Gopher] MIPS provides highly scalable RISC processor IP ___________________________________________________________________ MIPS provides highly scalable RISC processor IP Author : kristianpaul Score : 31 points Date : 2022-04-06 18:24 UTC (4 hours ago) (HTM) web link (www.mips.com) (TXT) w3m dump (www.mips.com) | azinman2 wrote: | The company is now Chinese owned, right? Would make sense they'd | want to go for RISC-V now that MIPS itself isn't viable. | Taniwha wrote: | Surely the headline should be "Berkeley beats Stanford"? | jecel wrote: | In terms of architectural style RISC-V is more similar to MIPS | (via DLX) than to RISC-I, II, SOAR and SPUR (and Sparc). | rbanffy wrote: | Hyperscalers make it easier to launch a new ISA - instead of | convincing a lot of manufacturers that build diverse products | with it, all of which you need to more or less manage into | compatibility so that your software doesn't get diluted, now you | need to convince one or two hyperscalers that your solution will | offer the same capacity in less space for less power. That, of | course, after some compiler enablement, but that's something | every ISA needs to do. You can start by building a beefy server | chip instead of a full lineup from thin laptops all the way up to | beefy servers. | yjftsjthsd-h wrote: | I know this is a kind of stupid little thing, but I really wish | they'd rebranded more completely if they were going to do this. | "That box has a MIPS processor in it. But not a MIPS processor, a | MIPS RISC-V processor." We're going to end up with OSs list on | their "supported platforms" page things like MIPS, MIPS64, MIPS- | brand RISC-V. | jogu wrote: | To be fair this isn't an announcement of a product or anything | like that, so their line of RISC-V processors could have | distinct branding e.g. FooBar RISC-V Processors (by MIPS). | | Totally agree though that they should probably be careful and | put some thought into how they brand these. | dkersten wrote: | Its not really a "stupid little thing", it sounds like a big | cause of confusion. | musicale wrote: | MIPS had their chance with MIPS Open and bungled it. If they | hadn't, then there wouldn't have been the same need for RISC-V. | | It's a shame because MIPS had a perfectly usable architecture | with 64-bit support and a well supported toolchain. | | It's sad to see it abandoned because it was historically one of | the first successful RISC architectures that was used in | everything from the DECstation to the PlayStation. | lizardactivist wrote: | I may recall wrong here, but I think MIPS is the only | architecture in use that has one's complement integer | arithmetics. | MisterTea wrote: | MIPS is making RISC-V processors? What happened to the MIPS arch | itself? | glowingly wrote: | Still used in some consumer devices with older Mediatek (MTK) | wireless SoCs and older Qualcomm (QCA) wireless SoCs. Qualcomm | has moved onto arm uarch, in addition to largely shuttering | their switch ASIC lineup (lots of MIPS in that product family). | MTK seems to be moving in the arm direction as well. | | Sometimes, we have vendors like Mikrotik who love the old QCA | MIPS lineup and shove those ancient SoCs into everything they | can. | | But the older MTK MIPS chips still seem to find a lot of new | hardware releases. I recently picked up a TPLink WiFi 6 AP | because it used Mediatek wifi chips, which are well supported | in the mainline kernel. Was a little surprised to see it still | used a Mediatek MIPS SoC as the main glue between the various | wireless chips. | | If you see a WiFi 6 AP that only has WiFi6 on 5GHz, and WiFi4/n | on 2.4GHz, a good chance it is using a MTK MIPS WiFi 4/n SoC + | a MTK WiFi 6 PCIe IC, with the SoC providing 2.4GHz and 5GHz | being provided by something like the MT7915 or similar. The | Ubiquiti U6 Lite and U6 LR are examples of this, as are the | Belkin RT3200 / Linksys E8450. | minimaul wrote: | > Sometimes, we have vendors like Mikrotik who love the old | QCA MIPS lineup and shove those ancient SoCs into everything | they can. | | Mikrotik don't really shove MIPS in anything new! Practically | everything they've launched in the last few years is either | ARM or ARM64. They seem to particularly love the | IPQ-4018/4019 SoCs. | glowingly wrote: | I agree, Mikrotik have largely moved onto the IPQ4000 | series for their wireless products and their many of their | advanced switches use the switch ASIC's onboard arm core(s) | (CRS305, CRS309, CRS317, CRS328, etc) without an external | management SoC. | | However, some of their advanced switches (CRS312 12 10GbE | RJ45, CRS354 48 GbE 4 SFP+ 2 QSFP+, CRS504 4 QSFP28, CRS326 | variant with 24 SFP+ 2 QSFP+, etc) will often use a QCA9531 | MIPS SoC as their management chip. | | I was surprised to see their latest switch, the new CRS504 | (4x 100GbE) [0] used a very advanced Marvell switch chip, | with a QCA9531 attached to it. MIPS lives! | | [0] https://www.youtube.com/watch?v=rE6fnmbOMD0 2:00 in, a | basic block diagram is shown. | minimaul wrote: | Huh, I stand corrected :) | | I did not realise that the CRS line was using MIPS so | much still! The CRS switches I have handy are all using | the integrated dual ARM cores. | | edit: I assume those switch chip variants don't have | integrated ARM cores, and the older Qualcomm MIPS SoCs | are presumably ridiculously cheap. | my123 wrote: | Slowly dithered away... | unfocussed_mike wrote: | Yep. Amazing when you consider that Windows CE ran on MIPS | hardware (NEC VR3xxx and VR4xxx chips). Casio's Cassiopeia | series for example. | | It's not quite a "what could have been" because they were | really eclipsed by the StrongARM at that point, as I recall, | but it's very notable how quickly people lost interest in | MIPS. | my123 wrote: | It lived on for quite a while with a strong position in the | networking market later on. | | But then instead of focusing on networking/infrastructure | hardware like they could have, they went on a wild goose | chase... to try to gain a place in phones. | glowingly wrote: | To be fair, Power PC was also trying an extended post-AIM | life in networking. I don't know if the big-endianess of | some networking stacks had anything to do with it. | | The earliest Killer networking cards had a PPC chip | onboard. One could even see it from the Windows Device | manager as such :D | | I see NXP has largely slowed development of their old | Freescale PPC lineup (formerly Motorola's PPC and logic | division) in favor of arm chips. | rbanffy wrote: | > The earliest Killer networking cards had a PPC chip | onboard. | | In my collection I have an IBM server that has two | Pentium II processors and, IIRC, three PowerPCs handling | specialized chores such as the network and disk array. | | The Telum processor is only part of the story of their | new mainframe too. While it's the Telum that runs the | application code, there are many other different | processors (and some Telums with different microcode | loaded on boot) performing specialized jobs. The machine | can have up to 256 Telum cores, but there's a maximum of | 200 that can be dedicated to user code. The remaining | cores will be working to ensure the user code doesn't | need to wait for anything. | gnulinux wrote: | MIPS is pretty similar to RISC-V, but RISC-V is a lot more | mature by now. Seems like a reasonable business decision. | masklinn wrote: | How can riscv be "more mature" when mips was used in | commercialised consumer and industrial devices 30 years ago? | | The PS, PS2 and PSP ran on mips. So did the N64. Multiple | top500 super-computers were mips. There were mips | workstations and servers. | | _mips went to pluto_ , the new horizon probe ran on mips. | andrekandre wrote: | > How can riscv be "more mature" when mips was used in | commercialised consumer and industrial devices 30 years | ago? | | one thing i can think of is risc-v has done away with | branch-delay slots... does modern mips isa still have | those? | azinman2 wrote: | That's not what mature means. Mature is that all edge | cases have been explored, all kinds of random numerical | computations have been expressed, tool chains & debuggers | exists in many forms and are well supported, the chips | have scaled from dish washers to RAD hardened satellites, | etc etc | [deleted] | panick21_ wrote: | What happened is that SGI dropped it and then it got passed | around like between one company after another while it | consistently lost more and more market share to ARM. | | Until MIPS was mostly irrelevant as an arch. | | So eventually the company realized that trying to only build on | MIPS was not gone work, so they Open-Sourced MIPS itself and | they are trying to use their knowledge to be part of the RISC-V | ecosystem. | | But since they were late to that game as well, I am skeptical. | monocasa wrote: | > they Open-Sourced MIPS itself | | Well, they didn't even do that, they just made a big | announcement that they were opening up which as far as I | could tell just meant they put a link to their sales staff on | a web page rather than making you look them up. | CalChris wrote: | The title really should say RISC-V rather than RISC. MIPS already | is a RISC, one of the first. ___________________________________________________________________ (page generated 2022-04-06 23:01 UTC)