[HN Gopher] The Next Incarnation of EDA
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       The Next Incarnation of EDA
        
       Author : mindcrime
       Score  : 19 points
       Date   : 2022-09-13 20:05 UTC (2 hours ago)
        
 (HTM) web link (semiengineering.com)
 (TXT) w3m dump (semiengineering.com)
        
       | buildbot wrote:
       | I really hope Lattice ends up leaning into the open source
       | symbiflow toolchains, it is amazingly awesome to have a decently
       | sized FPGA that run Linux, that could even self host it's own
       | firmware compilation. (VERY SLOWLY!)
        
       | jstx1 wrote:
       | Electronic design automation apparently, not exploratory data
       | analysis.
        
       | artisanspam wrote:
       | I don't think that most software engineers understand how they
       | good they have it with access to open source software. The most
       | apt comparison I can think of to EDA is a mathematical computing
       | environment (MATLAB, Mathematica, Maple, etc.) but an order of
       | magnitude more constrained.
       | 
       |  _Everything_ in EDA is licensed. Simulators, emulators,
       | synthesis, IDEs, formal verification, coverage, waveform viewers,
       | and most post-silicon tools. You work with Intel /ARM? Any tools
       | they make are licensed, too. You can't make CI/CD pipelines when
       | you only have 3 $1000 compiler licenses for your whole company.
       | Your JetBrains suite that costs $300/year for dozens of IDEs?
       | It's not uncommon for HDL IDE licenses to be >$1000 for a single
       | user.
       | 
       | Contrast that to most traditional software development, where the
       | cost is solely in how much compute you're using.
       | 
       | I know that open-source EDA doesn't necessarily mean FOSS EDA,
       | but that "free" part _really_ is what 's needed here.
        
         | digdugdirk wrote:
         | And here I am designing physical consumer products thinking the
         | people in EDA have it good.
         | 
         | A single license of CAD software with an FEA analysis add-on
         | can easily run you $15k. Then the thought of shelling out for
         | physical product testing will make you cry yourself to sleep.
        
           | buildbot wrote:
           | And Autodesk is a detestably evil company to boot.
        
           | kevin_thibedeau wrote:
           | Professional electronic design tools go through the
           | stratosphere on pricing. There is lower demand than
           | mechanical CAD tooling so they have to charge more to cover
           | development costs. Lower demand also means that open source
           | offerings usually pale in comparison to pro level tools from
           | 20 years ago or more.
        
           | iron2disulfide wrote:
           | The $1k figure quoted by OP is not indicative of the average
           | price of licenses in my experience. There are plenty of tools
           | that are $15k+ in the EDA world, and various engineers in
           | chip design orgs are always battling about who gets to use
           | them and when. There are whole teams in big SoC design shops
           | dedicated to managing and procuring licenses.
           | 
           | I was pretty far removed from the license procurement and
           | budgeting aspect of my last chip design job, but IIRC we were
           | in the multi-millions per year in various EDA tool licenses.
           | That figure may or may not have included IP licenses for pre-
           | designed off-the-shelf subsystems.
        
             | nsteel wrote:
             | Same. We pay millions of dollars for our simulator
             | licenses. Same again for physical design/layout licenses.
             | These are for the standard ('best') industry tools, no IP.
             | No idea what you get for $1k.
        
             | artisanspam wrote:
             | I hadn't even brought up IP licensing but you're right.
             | That's another order of magnitude of cost and it's
             | incredibly important.
        
           | [deleted]
        
         | MayeulC wrote:
         | You can get pretty far with yosys, icarus verilog, various
         | spice simulators and gtkwave, but I agree.
         | 
         | At least, interchange formats are pretty well specified
         | (netlists, HDL, waveforms...), maybe except for the proprietary
         | "Open Access" format.
        
           | artisanspam wrote:
           | If you suggest using those tools for most industry
           | semiconductor work you'll be laughed out of the room. I wish
           | it wasn't the case, but these tools aren't good enough for
           | most industry use cases.
        
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