[HN Gopher] NASA Uses RISC-V Vector Spec to Soup Up Space Computers
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       NASA Uses RISC-V Vector Spec to Soup Up Space Computers
        
       Author : JoachimS
       Score  : 32 points
       Date   : 2022-11-22 21:47 UTC (1 hours ago)
        
 (HTM) web link (www.eetimes.com)
 (TXT) w3m dump (www.eetimes.com)
        
       | hajile wrote:
       | NASA probably stands to save a lot of duplicated development time
       | if they could use just one ISA from their tiny MCUs to large HPC
       | chips. It would also help with vendor dependency. If a vendor
       | doesn't work out, just move to another RISC-V vendor.
       | 
       | Why not ARM then? Because NASA can use their own implementations
       | in FPGA without paying a bunch of extra money for the privilege.
        
       | christkv wrote:
       | Are these hardened cpus? Do they run two in parallel executing
       | the same code as previous cpus?
        
       | swamp40 wrote:
       | _Soup up originated in the U.S. in the late 19th century, though
       | it wasn 't widely used until the 20th century. Its exact origins
       | are unknown, but it could be short for supercharge, or it might
       | come from a horse-racing slang term for injecting horses with
       | narcotics meant to make them run faster._
       | 
       | Interesting. I never saw it spelled like that before. Looks like
       | no one knows how it should be spelled, so all variations are
       | fine.
        
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       (page generated 2022-11-22 23:00 UTC)