[HN Gopher] The Death of SRAM? ___________________________________________________________________ The Death of SRAM? Author : _hypx Score : 37 points Date : 2022-12-14 20:55 UTC (2 hours ago) (HTM) web link (fuse.wikichip.org) (TXT) w3m dump (fuse.wikichip.org) | nordsieck wrote: | > So where do we go from here? The reality is that currently, the | only viable alternative to SRAM is simply more SRAM, and | therefore we expect to see SRAM directly consuming more area. | | Betteridge's law strikes again. | richardjam73 wrote: | It's more of an extinction than a death. If SRAM can't shrink | it will eventually be replaced by other technologies that can. | EarlKing wrote: | Not exactly. SRAM will be replaced by other technologies that | can if and only if there is a commensurate increase in speed | (since that's the whole point of using SRAM over DRAM). | _hypx wrote: | There's already talk of STT-MRAM or SOT-MRAM replacing | SRAM. They offer similar performance while also being non- | volatile. If SRAM scaling ends, this becomes a much more | promising technology. | | https://semiengineering.com/sot-mram-to-challenge-sram/ | userbinator wrote: | _such as higher density at lower read /write specifications, non- | volatility capabilities, lower read-write cycle capabilities_ | | Also known as NAND flash, i.e. the chips that actually wear out. | Another example of planned obsolescence creeping in to what used | to be effectively unlimited lifespan for "solid state" | electronics? | to11mtm wrote: | There's different options for different things. | | You have: | | - EEPROM for low/medium frequency of update, small size, | persistence | | - NAND flash for low/medium frequency of update, semi-arbitrary | size, persistence | | - eDRAM variants (Mosys '1T SRAM' comes to mind, which is still | DRAM but has more dedicated Row/Column circuitry vs SDRAM's | RAS-CAS timing shenanigans) for frequent update, volatile or | maybe battery backed storage, non-persistent | | Which... we -kinda- see in some layers already, as eDRAM has | gone from 'fancy server procs and halo mobile chips' to a | -little- more mainstream. | ajross wrote: | Wasn't this already sorta common knowledge? Almost the tricks in | recent process generations to increase density have been | vertical. FinFETs et. al. work by stretching the transitor | upwards to increase gate area, so it drives harder and you need | fewer of them to implement the same logic. But the actual pitches | of the gate and fins haven't been changing nearly as fast, so the | smallest circuits aren't seeing much benefit. | | A SRAM cell is 6-8 transistors all connected internally with only | a read and data line coming out (well, and the power rails). | That's already horizontally packed, making the transistors | beefier won't help anything. | aidenn0 wrote: | Do recent generations help at all with multiply ported SRAM? | mjevans wrote: | Not the death, but AMD's chiplets at different process nodes is | the approach of the future. One of the slides I remember from an | AMD presentation in recent Gamers Nexus videos showed curves for | cache, logic, and a third curve across process nodes. | | SRAM has desirable properties; simplicity, self sustaining state, | latency. | | The flattening curves follow the approach to the physical limits | of doped silicon. It'll be interesting to see if another electron | based but different semiconductor or another method of computing | entirely (maybe photonics or some other range of the EM | spectrum?) continues the rise in density or if we instead focus | more on optimizing hardware and software. | arcticbull wrote: | Yeah, basically. The 3D-VCache approach reduces the need for | scaling by increasing the surface area available. It's not | quite as important to get the absolute smallest transistors if | you can use a larger process node, make the cache the same size | as the entire rest of the die, then stick it on top. | | You're no longer competing for space on the same die as the | functional units. | Gualdrapo wrote: | Oh. _That_ SRAM. For a moment I imagined Bauke Mollema was | cheering up reading this[0]. | | [0] https://www.youtube.com/watch?v=Tsk3zAZyLaQ | davidw wrote: | Yeah... started thinking "uh oh, where am I going to get | replacement bits for my MTB?!" | turminal wrote: | Age restricted and wants me to sign in :( | LeifCarrotson wrote: | They're talking about the bicycle component vendor named | SRAM: | | https://www.sram.com/en/sram/mountain | to11mtm wrote: | It's been forever since I've been deep into biking so I'm | afraid to click the link. | | 9 speed was already almost too much for a 'casual- | enthusiast' [0]. | | But in general, Shimano or Campy is my preference for | drivetrain [1] and Avid/Shimano for brakes [2]. | | [0] - I've blown out 9 speed cassette in less than 1k miles | due to my riding style (skipping gears). NEVER had a | similar problem on the 8 speed cassettes or 5 speed | freewheels I would roll on. | | [1] - Ok so I had a SRAM grip-shift break in a way it shot | plastic in my face which was a terrible first impression. | But also I've had 'issues' with a lot more SRAM vs Shimano | when building/maintaining bikes. And then there was the | Truvativ 3 speed road crank that could never get adjusted | right (FWIW, I got the same 'model' as a double for a | tandem and it was bliss... but that is my point about QC.) | Also, that mess that was 'power spline'. Tore that up | before in less than 500 miles. | | [2] - In the day I was all about Speed-Dial 7s[3] for | levers and BB7s for brakes (Very adjustable, none of the | pains of fluid based disc brakes) and Shimano had a bad | habit of trying to make things proprietary (center-lock | disc hubs). | | [3] - SD7s are the best retrofit-bike thing on the planet, | because they can make all sorts of old/new brake | combinations work with a consistent set of levers! ___________________________________________________________________ (page generated 2022-12-14 23:00 UTC)