[HN Gopher] A radiation hard RISC-V microprocessor for high-ener... ___________________________________________________________________ A radiation hard RISC-V microprocessor for high-energy physics applications Author : PaulHoule Score : 35 points Date : 2023-04-06 18:54 UTC (4 hours ago) (HTM) web link (arxiv.org) (TXT) w3m dump (arxiv.org) | taraharris wrote: | Wow, cool. The article says they're clocked between 10 and 100 | MHz. Neat! | narrator wrote: | Could these be used in robots cleaning up the Fukushima power | plant or other radioactive disaster areas? | optimalsolver wrote: | If you prefer your radiation-hardened processors to be stack- | based, I gotchu: | | https://en.m.wikipedia.org/wiki/RTX2010 | pkaye wrote: | That processor is 35 years old. I doubt it is available | anymore. | Rebelgecko wrote: | I dunno, the RAD750 is 20+ years old, based on an even older | PowerPC chip from the 90s, and still going strong. | PaulHoule wrote: | ... an example of the kind of application RISC-V was intended | for; special-purpose microprocessors which might be produced in | relatively low numbers. | jahnu wrote: | Dumb question: how much lead would it take to shield an | unhardened cpu for space missions? | nerpderp82 wrote: | Depends on the radiation flux for where you are going. Either | high energy protons or electrons. | PaulHoule wrote: | Depends what kinda of radiation and where. If you get outside | the Earth's magnetic field Gerard K O'Neill said you needed six | feet of soil equivalent to stop protons from the Sun for a | space colony with a long-term safe environment. | | It's somewhat more complicated than that because there are very | high energy cosmic rays that explode atoms when they hit and | make showers of radioactive particles which are still going to | affect you to some extent with the 6 foot shield, the effects | might be worse if you added more shielding because the more | shielding you have the more chances one of those heavy cosmic | rays will blow up an atom in it. | jahnu wrote: | Very interesting. Thank you! | nullc wrote: | To deal with that the solution is usually stack of dissimilar | materials so that the shower from one layer is stopped by a | later layer. | pkaye wrote: | Microchip has already been working on a rad-hardened Risc-V | processor. | | https://abopen.com/news/microchip-shows-off-rad-hardened-ris... | | NASA also has a contract with Microchip and SiFive to develop | Risc-V processor for space missions. | | https://www.eejournal.com/article/nasa-recruits-microchip-si... | nerpderp82 wrote: | This was done in 64nm CMOS. | | I'd love to see rad hard in SiC! | | Here is a paper on a high temp SiC RISC-V | https://ieeexplore.ieee.org/document/9774769 | | > We choose RISC-V ISA because it is opensource, small and | simple, to avoid over-architecting and ease of extensions | | The used this core for the SiC research, | https://github.com/bespoke-silicon-group/bsg_manycore/tree/m... ___________________________________________________________________ (page generated 2023-04-06 23:00 UTC)