[HN Gopher] The complex history of the Intel i960 RISC processor
       ___________________________________________________________________
        
       The complex history of the Intel i960 RISC processor
        
       Author : zdw
       Score  : 65 points
       Date   : 2023-07-01 17:49 UTC (5 hours ago)
        
 (HTM) web link (www.righto.com)
 (TXT) w3m dump (www.righto.com)
        
       | jecel wrote:
       | Great blog post. Some observations:
       | 
       | Ada was not originally an object-oriented language, though it
       | eventually became so. But the 432 project predated Ada and
       | pivoted to that language when it came out. Intel had to adapt Ada
       | to work with objects (it was pretty close already).
       | 
       | An advantage of the 33 bit scheme to protect capabilities is that
       | you can push them on the stack where they will get mixed with
       | normal data and then pop them later such that everything still
       | works. In the 432 style you would need two separate stacks or
       | awkwardly work around not being able to push/pop capabilities.
       | 
       | The "AND NOT" instruction is interesting for using a mask to
       | clear bits. which is why it is called "BIC" on the ARM.
       | 
       | While the 186 and 286 were flawed for making IBM PC compatible
       | machines, for what they had been designed for they did a pretty
       | good job.
        
       | eep_social wrote:
       | > Even though the SB didn't support memory management or objects,
       | Intel didn't remove that circuitry.
       | 
       | I am curious about this detail. Was this due to production line
       | convenience, an early example of binning, or probably something
       | else entirely?
        
       | adrian_b wrote:
       | As always in this blog, the article is well researched and it
       | includes a lot of interesting information.
       | 
       | Nevertheless, there is an important point about 80960 that is not
       | discussed at all. There still exists a legacy of 80960 that is
       | incorporated in all modern Intel and AMD CPUs, which consists of
       | the XADD (normally LOCK XADD) instruction.
       | 
       | Before 1980, the instruction sets of the CPUs included 3 kinds of
       | atomic read-modify-write instructions (I mean dedicated atomic
       | instructions, not just locked variants of some standard
       | instruction with a memory operand): test-and-set (introduced by
       | UNIVAC 1108 in 1965; e.g. Motorola MC68000 had TAS), swap
       | (introduced by Edsger W. Dijkstra in 1971-10; e.g. Intel 8086 had
       | it under the mnemonic LOCK XCHG) or compare-and-swap (both
       | compare-and-swap and compare-double-and-swap were added to IBM
       | System/370 in 1973; Motorola MC68020 added similar instructions
       | in 1984).
       | 
       | The next innovation in atomic instructions happened in 1981, when
       | Allan Gottlieb and Clyde P. Kruskal proposed the fetch-and-add
       | operation for the NYU Ultracomputer project.
       | 
       | For the next few years, the fetch-and-add operation remained
       | available just in that academic project, but then somebody
       | decided to implement it in 80960.
       | 
       | Fetch-and-add was first documented publicly by Intel in early
       | 1988, in the BiiN description, under the mnemonic ATADD (atomic
       | add). The ATADD instruction was also supported by 80960MC and
       | 80960KB, which were launched later in 1988.
       | 
       | One year later after 80960, on 1989-04-10, Intel launched the
       | 80486 CPU, whose most important ISA enhancements over 80386 were
       | extra atomic instructions, i.e. fetch-and-add from 80960 (LOCK
       | XADD) and compare-and-swap from IBM and Motorola (LOCK CMPXCHG).
       | 
       | Since 80486, all Intel and AMD CPUs include the fetch-and-add
       | instruction inherited from 80960 (whose origin was in the NYU
       | Ultracomputer).
        
         | alexjplant wrote:
         | > Clyde P. Kruskal proposed the fetch-and-add operation for the
         | NYU Ultracomputer project.
         | 
         | I had no idea that my Discrete Structures professor from
         | undergrad had such a storied CV! Kruskal was one of my favorite
         | professors. One thing that sticks in my mind about him was what
         | he said when he got to the Honor Code section of the syllabus
         | while going over it on the first day of class. Instead of
         | giving us the customary speech (humorous, menacing, or
         | otherwise) about catching students cheating in the past and
         | their academic records being ruined he simply said "I trust you
         | all implicitly to do the right thing" and moved on. He was a
         | great teacher and was similarly engaging for the rest of the
         | semester.
        
         | kens wrote:
         | That's an interesting piece of history. Thank you for sharing
         | it.
        
       | quercusa wrote:
       | Great info as always, Ken.
       | 
       | In the early and mid-90s, Intel was pushing their Intelligent I/O
       | initiative (aka I2O with a subscript '2'). This had a split-
       | driver model, the bottom half of which ran on an i960. It had no
       | performance advantage and IHVs suspected it was an Intel plan to
       | sell 960s and take away their secret-sauce advantages.
       | 
       | I2O didn't provide much advantage on 1-4 processor systems but
       | provided much of the underpinnings for the NGIO and InfiniBand
       | I/O model.
        
         | kens wrote:
         | Yes, interest in I2O was lukewarm for the reasons you mention.
         | I gave I2O a brief mention in the article but didn't want to go
         | into too much of a tangent :-)
         | 
         | I suspect that some people at Intel really wanted to have IBM
         | System/360 mainframe style I/O channels. There was the 8089 I/O
         | coprocessor for the 8086. The iAPX 432 had a I/O coprocessor
         | (43203) that worked with another microprocessor to act as an
         | I/O channel. And then there was I2O, using an i960 as an I/O
         | processor.
        
           | rjsw wrote:
           | The 8089 coprocessor was used in the Apricot PC [1], I had
           | one but don't remember any documentation for the 8089 being
           | available at the time.
           | 
           | [1] https://en.wikipedia.org/wiki/Apricot_PC
        
       | pinewurst wrote:
       | I wouldn't say BiiN sold fault-tolerant workstations. They were
       | departmental and perhaps the next step up servers.
       | 
       | I remember evaluating the CA for a smaller router and found it a
       | perfectly reasonable part/pricing especially when compared with
       | the other options (some weird AMD 29k variant and the local reps
       | of the Transputer cult who never accepted the non-arrival of the
       | T9000).
        
         | kens wrote:
         | Thanks, I've updated the article.
        
           | pinewurst wrote:
           | I also vaguely remember BiiN failed due to being too slow for
           | their price (despite their claimed MIPS) and that their Ada
           | OS was a disaster of a software development project, not even
           | sure if it seriously shipped.
        
       | kens wrote:
       | I'm sure there are a bunch of people on HN who have used the
       | i960. Author here if anyone has questions about the article.
        
         | jjtheblunt wrote:
         | Was the i960 in laserprinters?
        
         | kps wrote:
         | At the time I worked for a small compiler shop, and we had a C
         | compiler for the i960 --
         | https://web.archive.org/web/19971014124149/http://www.archel...
         | -- In particular I wrote the standalone instruction scheduler
         | described under 'Scheduler optimizations', particularly useful
         | for the superscalar variants.
        
         | jes wrote:
         | I worked at Applied Microsystems (now defunct). We made in-
         | circuit emulators and did one for the 80960CA variant. I
         | remember that processor had an undocumented (IIRC) feature
         | called "Incremental Trace" that would allow the emulator to
         | keep track of what the processor was doing. We used it to
         | develop an execution trace disassembler for the processor.
         | 
         | I seem to remember HP/Boise was using a lot of the CA parts for
         | use in printers. They had one of our emulators, and I remember
         | that we once got a report of the emulator probe tip having
         | caught fire (!) due a short or some such.
         | 
         | I enjoyed working with the CA part. I also worked with the
         | 80960MX part. Now, that was an odd processor!
        
           | jes wrote:
           | Following up my own post, I also remember the hardware guys
           | having occasional phone calls with some guy known only as
           | "Larry" at Intel. I'm guessing he was a microcode guy or some
           | such. Would be interesting to know more about him.
        
       | b800h wrote:
       | With regards to BiiN, one thing I'm not familiar with was how the
       | serial connection to, say, 80 terminals was handled on a machine
       | like this. If I had 80 Wyse terminals (alas, I only have two),
       | and wanted to hook them up to, for example, a Linux server, how
       | would I go about doing that?
        
         | Beermotor wrote:
         | I'm going from 30+ year old memories as an intern, but from
         | what I remember:
         | 
         | Usually the RS232 was just on the terminal side. Somewhere
         | along the path it got converted to twisted pair.
         | 
         | All the twisted pair serial lines congregated in the server
         | room at a punch-down box. Eighteen year old me wasn't allowed
         | to mess with anything past that point, but from what I can
         | remember those lines were concentrated by a multiplexer (mux)
         | and sent on to the minicomputer.
        
         | adrian_b wrote:
         | Thirty years ago ISA cards with 8 RS-232 interfaces were
         | common, so connecting some 30 or even 50 terminals to a single
         | PC was not difficult. I have used a few such computers for
         | testing various devices with serial interfaces.
         | 
         | Eighty terminals on a single PC might have been more difficult,
         | but by that time the computers were already networked, so it
         | would have been cheaper to just use two PCs than to use some
         | kind of terminal aggregator.
        
         | kens wrote:
         | The BiiN systems supported RS-232, RS-422, and TTY current
         | loop. I assume you plugged a serial interface board into the
         | system that provided multiple serial ports. But it might have
         | been an external terminal concentrator (or establishment
         | controller in IBM lingo) that hosted the terminals.
        
           | b800h wrote:
           | I'm still unclear on this - I notice from online that Linux,
           | for example, supports up to 256 TTY devices by default. How
           | might one go about actually physically hooking up that many
           | devices these days? Is a terminal concentrator still
           | available?
        
             | convolvatron wrote:
             | 16 port isa cards were a thing. apparently they are still
             | made. not fond memories.
        
             | marcus0x62 wrote:
             | In the mid 90's we used Cyclades multi-port serial cards to
             | do this. These were PCI cards that connected to one or more
             | breakout boxes that contained (in our case) 16 RS-232 ports
             | each. We had 48 total ports connected to a 60mhz Pentium
             | with 32MB of RAM.
             | 
             | This was a decidedly low budget solution, even at the time.
             | There were also commercial offerings from vendors like
             | Cisco and Livingston that provided a terminal server in a
             | dedicated appliance form factor.
             | 
             |  _edit_ the breakout boxes look like this:
             | https://149707953.v2.pressablecdn.com/wp-
             | content/uploads/imp...
        
             | kens wrote:
             | Here's an example of a PCI card that supports 16 RS-232
             | devices: https://www.amazon.com/StarTech-com-PCI-Express-
             | Serial-Card/... (not an affiliate link)
        
             | yjftsjthsd-h wrote:
             | If you asked me to do it, I'd probably see how many
             | serial/USB adapters I could plug into how many USB hubs
             | attached to a single box. I can't _see_ any reason it
             | wouldn 't work, and the parts are cheap enough, and not
             | even particularly obscure. I _suspect_ the failure point
             | would be something in the stack not expecting to have to
             | operate like that and having insufficient performance, but
             | this is all speculative.
        
         | SoftTalker wrote:
         | You'd use a terminal server between the terminals and the linux
         | box.
         | 
         | DECserver was a popular one back in the day.
         | 
         | https://en.wikipedia.org/wiki/DECserver
         | 
         | These days it might be more economical to just have something
         | like a Raspberry Pi attached at each terminal. Then the
         | connections to your network could all be wireless.
        
       | h2odragon wrote:
       | the bond wires on only 2 sides thing is so wild. Perhaps the
       | original use was supposed to be in clusters of 4? How many of
       | these things did the NSA eat, i wonder?
        
         | kens wrote:
         | I think the bond wire pattern was just for layout convenience:
         | if the buses end up on one side, why run wiring around to the
         | other side?
         | 
         | As far as the NSA, I haven't come across any mention of the NSA
         | using the chip, but I guess that doesn't say much :-) The chip
         | was popular with the military and it seems like to would be
         | good for NSA-style applications (processing large quantities of
         | data). The i960 has bit instructions that would be useful for
         | the NSA such as scan for the most-significant set bit in a
         | word, although I don't think it has population-count which the
         | NSA likes.
        
       ___________________________________________________________________
       (page generated 2023-07-01 23:00 UTC)