[HN Gopher] Nuked-MD-FPGA - accurate Sega Genesis re-implementat... ___________________________________________________________________ Nuked-MD-FPGA - accurate Sega Genesis re-implementation based on decapped chips Author : retro_guy Score : 69 points Date : 2023-08-03 21:38 UTC (1 hours ago) (HTM) web link (github.com) (TXT) w3m dump (github.com) | mg794613 wrote: | What is a good fpga starter board that's big enough to load this? | It's not obvious from the repo as a complete novice in fpga land. | FirmwareBurner wrote: | An FPGA board is not enough, you also need the "compiled | netlist" from the Verilog files, clock settings and routing | files for your specific FPGA board. | mg794613 wrote: | _making notes_ | unixhero wrote: | This is such a parallel universe of computing | tails4e wrote: | Is the RTL autogenerated from the chip images? I looked at one | file 68k.v and the variable names remind me of a decompiler. | lprib wrote: | It's probably hand written but they didn't reverse engineer the | purpose of each wire, only the netlist. Some of them are | labeled, eg `irdbus_normal`. | qingcharles wrote: | I wondered the same thing. Otherwise that is a lot of code to | write. The type of code that will cook your brain very quickly. | vmladenov wrote: | I'm curious how this compares to Analogue's implementation for | their Mega Sg. | yakkityyak wrote: | Very cool. I suppose this means someone could wire this to MiSTer | or Analogue Pocket, or are they lacking the correct fpga | requirements? ___________________________________________________________________ (page generated 2023-08-03 23:00 UTC)