604e Instructions Cycles

Last updated: 01 October 1998
Important: This is not 'simplified mnemonic' used in this doc,
so when you see instructions don't panic :))
Integer Instructions
Interger Arithmetic Instructions
Interger Compare Instructions
Integer Logical Instructions
Integer Rotate Instructions
Integer Shift Instructions
Integer Store Instructions
Integer Load and Store with Byte-Reverse Instructions
Integer Load and Store Multiple Instructions
Integer Load and Store String Instructions

Floating-Point Instructions
Floating-Point Arithmetic Instructions
Floating-Point Multiply-Add Instructions
Floating-Point Rounding and Conversion Instructions
Floating-Point Compare Instructions
Floating-Point Status and Control Register Instructions
Floating-Point Move Instructtions
Floating-Point Load Instructions
Floating-Point Store Instructions

Branch and Flow Control Instructions
Branch Instructions
Condition Register Logical Instructions

Some Others :)
Trap Instructions
Move to/from Condition Register Intstructions
Memory Synchronisation Instructions

VEA Instructions
Processor Control Instructions
Memory Synchronisation Instructions
User-Level Cache Instructions
External Control Instructions

OEA Instructions
System Linkage Instructions
Move to/from Machine State Register Instructions
Move to/from Special-Purpose Register Instructions
Memory Control Instructions
Supervisor-Level Cache Management Instructions
Segment Register Manipulation Instructions
Translation lookaside Buffer Management Instructions
Integer Arithmetic Instructions
NameUnitCycleSerialization
addiSCIU1-
addisSCIU1-
add (add. addo addo.)SCIU1-
subf (subf. subfo subfo.)SCIU1-
addicSCIU1-
addic.SCIU1-
subficSCIU1-
addc (addc. addco addco.)SCIU1-
subfc (subfc. subfco subfco.)SCIU1-
adde (adde. addeo addeo.)SCIU1Execute
subfe (subfe. subfeo subfeo.)SCIU1Execute
addme (addme. addmeo addmeo.)SCIU1Execute
subfme (subfme. subfmeo subfmeo)SCIU1Execute
addze (addze. addzeo addzeo.)SCIU1Execute
subfze (subfze subfzeo subfzeo.)SCIU1Execute
neg (neg. nego nego.)SCIU1-
mulliMCIU3-
mullw (mullw. mullwo mullwo.)MCIU4(3)-
mulhw (mulhw.)MCIU4(3)-
mulhwu (mulhwu.)MCIU4(3)-
divw (divw. divwo divwo.)MCIU20-
divwu (divwu. divwuo divwuo.)MCIU20-

Integer Compare Instructions
NameUnitCycleSerialization
cmpiSCIU1-
cmpSCIU1-
cmpliSCIU1-
cmplSCIU1-

Integer Logical Instructions
NameUnitCycleSerialization
andi.SCIU1-
andis.SCIU1-
oriSCIU1-
orisSCIU1-
xoriSCIU1-
xorisSCIU1-
and (and.)SCIU1-
or (or.)SCIU1-
xor (xor.)SCIU1-
nand (nand.)SCIU1-
nor (nor.)SCIU1-
eqv (eqv.)SCIU1-
andc (andc.)SCIU1-
orc (orc.)SCIU1-
extsb (extsb.)SCIU1-
extsh (extsh.)SCIU1-
cntlzw (cntlzw.)SCIU1-

Integer Rotate Instructions
NameUnitCycleSerialization
rlwinm (rlwinm.)SCIU1-
rlwnm (rlwnm.)SCIU1-
rlwimi (rlwimi.)SCIU1-

Integer Shift Instructions
NameUnitCycleSerialization
slw (slw.)SCIU1-
srw (srw.)SCIU1-
srawi (srawi.)SCIU1-
sraw (sraw.)SCIU1-

Integer Load Instructions
NameUnitCycleSerialization
lbzLSU2-
lbzxLSU2-
lbzuLSU2-
lbzuxLSU2-
lhzLSU2-
lhzxLSU2-
lhzuLSU2-
lhzuxLSU2-
lhaLSU2-
lhaxLSU2-
lhauLSU2-
lhauxLSU2-
lwzLSU2-
lwzxLSU2-
lwzuLSU2-
lwzuxLSU2-

Integer Store Instructions
NameUnitCycleSerialization
stbLSU3Execute
stbxLSU3Execute
stbuLSU3Execute
stbuxLSU3Execute
sthLSU3Execute
sthxLSU3Execute
sthuLSU3Execute
sthuxLSU3Execute
stwLSU3Execute
stwxLSU3Execute
stwuLSU3Execute
stwuxLSU3Execute

Integer Load and Store with Byte-Reverse Instructions
NameUnitCycleSerialization
lhbrxLSU2-
lwbrxLSU2-
sthbrxLSU3Execute
stwbrxLSU3Execute

Integer Load and Store Multiple Instructions
NameUnitCycleSerialization
lmwLSU2+nString/Multiple
stmwLSU2+nString/Multiple
Load and store multiple instruction cycles are shown as a fixednumber
of cycles plus a variable number of cyles where 'n' is the number of
words accessed by the instruction

Integer Load and Store String Instructions
NameUnitCycleSerialization
lswiLSU2(n)+2String/Multiple
lswxLSU2(n)+2String/Multiple
stswiLSU2+nString/Multiple
stswxLSU2+nString/Multiple
Load and store multiple instruction cycles are shown as a fixednumber
of cycles plus a variable number of cyles where 'n' is the number of
words accessed by the instruction

Floating Point Arithmetic Instructions
NameUnitCycleSerialization
fadd (fadd.)FPU3-
fadds (fadds.)FPU3-
fsub (fsub.)FPU3-
fsubs (fsubs.)FPU3-
fmul (fmul.)FPU3-
fmuls (fmuls.)FPU3-
fdiv (fdiv.)FPU32FP Empty
fdivs (fdivs.)FPU18FP Empty
fres (fres.)FPU18FP Empty
frsqrte (frsqte.)FPU3-
fsel (fsel.)FPU3-

Floating Point Multiply-Add Instructions
NameUnitCycleSerialization
fmadd (fmadd.)FPU3-
fmadds (fmadds.)FPU3-
fmsub (fmsub.)FPU3-
fmsubs (fmsubs.)FPU3-
fnmadd (fnmadd.)FPU3-
fnmadds (fnmadds.)FPU3-
fnmsub (fnmsub.)FPU3-
fnmsubs (fnmsubs.)FPU3-

Floating Point Rounding and Conversion Instructions
NameUnitCycleSerialization
frsp (frsp.)FPU3-
fctiw (fctiw.)FPU3-
fctiwz (fctiwz.)FPU3-

Floating Point Compare Instructions
NameUnitCycleSerialization
fcmpuFPU3-
fcmpoFPU3-

Floating Point Status and Control Register Instructions
NameUnitCycleSerialization
mffs (mffs.)FPU3-
mcrfsFPU3-
mtfsfi (mtfsfi.)FPU3-
mtfsf (mtfsf.)FPU3-
mtfsb0 (mtfsb0.)FPU3-
mtfsb1 (mtfsb1.)FPU3-

Floating Point Move Instructions
NameUnitCycleSerialization
fmr (fmr.)FPU3-
fneg (fneg.)FPU3-
fabs (fabs.)FPU3-
fnabs (fnabs.)FPU3-

Floating-Point Load Instructions
NameUnitCycleSerialization
lfsLSU3-
lfsxLSU3-
lfsuLSU3-
lfsuxLSU3-
lfdLSU3-
lfdxLSU3-
lfduLSU3-
lfduxLSU3-

Floating-Point Store Instructions
NameUnitCycleSerialization
stfsLSU3Execute
stfsxLSU3Execute
stfsuLSU3Execute
stfsuxLSU3Execute
stfdLSU3Execute
stfdxLSU3Execute
stfduLSU3Execute
stfduxLSU3Execute
stfiwxLSU3Execute

Branch Instructions
NameUnitCycleSerialization
b (ba bl bla)BPU1-
bc (bca bcl bcla)BPU1-
bclr (bclrl)BPU1-
bcctr (bcctrl)BPU1-

Condition Register Logical Instructions
NameUnitCycleSerialization
crandBPU1Execute
crorBPU1Execute
crxorBPU1Execute
crnandBPU1Execute
crnorBPU1Execute
creqvBPU1Execute
crandcBPU1Execute
crorcBPU1Execute
mcrfBPU1Execute

Condition Register Logical Instructions
NameUnitCycleSerialization
twiSCIU1-
twSCIU1-

Move to/from Condition Register Instructions
NameUnitCycleSerialization
mtcrf (0/multiple bit)MCIU1Dispatch/Execute
mtcrf (single bit)SCIU1-
mcrxrMCIU3Execute
mfcrMCIU1Execute

Memory Synchronisation Instructions (UISA)
NameUnitCycleSerialization
lwarxLSU3+busExecute
stwcx.LSU3Execute
syncLRU--

Processor Control Instructions (VEA)
NameUnitCycleSerialization
mftbMCIU3Execute

Memory Synchronization Instructions (VEA)
NameUnitCycleSerialization
eieioLSU-I/O
isyncCompletion1Postdispatch

User-Level Cache Instructions (VEA)
NameUnitCycleSerialization
dcbtLSU-Execute
dcbtstLSU-Execute
dcbzLSU3Execute
dcbstLSU-Execute
dcbfLSU-Execute
IcbiLSU--

External Control Instructions (VEA)
NameUnitCycleSerialization
eciwxLSU2+busExecute
ecowxLSU3+busExecute

System Linkage Instructions (OEA)
NameUnitCycleSerialization
scCompletion-Postdispatch
rfiCompletion-Dispatch

Move to/from Machine State Register Instructions (OEA)
NameUnitCycleSerialization
mtmsrMCIU1Execute
mfmsrMCIU3Execute

Move to/from Special-Purpose Register Instructions (OEA)
NameUnitCycleSerialization
mtspr (LR/CTR)MCIU1Dispatch
mtspr (XER)MCIU1Complete
mtspr (others)MCIU1Execute
mfspr (LR/CTR)MCIU3Execute
mfspr (others)MCIU3Execute

Memory Control Instructions (OEA)
NameUnitCycleSerialization
dcbiLSU3Execute

Translation Lookaside Buffer Management Instructions (OEA)
NameUnitCycleSerialization
tlbieLSU-Execute
tlbsyncLSU--