A Review of a Design Document for the uPD7281 Processor

The document under review may be found here: http://merlintec.com/download/nec7281.pdf

An acquaintance of mine is fascinated with data-flow machines, as am I.  The base concept is that of
computations being carried out once all needed inputs become available.  The most pure thought stuff
out of which I may frame the idea is as a network of computational units which pluck packets of data
out of a stream thereof, whenever one such unit identifies the packet as being applicable to itself.

An analogy I enjoy is the comparison of a ``von Neumann'' machine to a factory in which an invisible
man is running around, to inch along all conveyer belts in sequence, performing work when a conveyed
item reaches some machine which manipulates it; it's clear how any such factory would be foolish and
wasteful, and that it would only approximate a real factory if that man were incredibly fast.  Every
``von Neumann'' machine has such an invisible man, called the Central Processing Unit, and no amount
of speed will ever correct his fundamental flaws.  The data-flow machine, however, can be thought of
as exactly like a real factory, but this analogy does little to help me think about its realization.

A better analogy than factories may be to compare data-flow machines to live cells, and how proteins
are synthesized by the necessary materials floating around and eventually matching up, but again the
analogy helps little in the realization of such a machine, and I'd not seen real data-flow machines.

Reading this document, which amounts to an educational advertisement, gave me something concrete for
my reasoning about data-flow machines and other ``non-von Neumann'' designs, for which I'm thankful.

The machine described therein is pipelined; input tokens are changed from external to internal forms
in steps, and then queued as necessary in small memories, before reaching a computational unit which
ends the cycle.  At first I'd thought it queer that the machine would have any such memories at all,
but then saw the necessity, and learned more intimately how the ``von Neumann bottleneck'' is caused
not by memories, but one memory to rule them.  This is a machine that has no pipeline stalls so long
as it has some way to progress, and that also gave to me a more intimate understanding of what makes
these machine types different.  If all individual units in a machine are operating at their greatest
capacity, then I suppose there's no real bottleneck, but ``von Neumann'' machines with pipelines are
prone to stalling by nature, which reintroduces the bottleneck.  One way data-flow machines increase
capacity is by removing global state stored in one memory, like a program counter, or a variable for
a variable, or other such nonsense; thus, if one memory be needed at some point, its capacity can be
effectively increased, by the reduction of unnecessary nonsense tangential to the machine's problem.

This document is littered with nice diagrams, examples, and a very simple program across many steps.
It was already clear to me that data-flow machines are akin to graph-reduction machines, but it very
much helps to have a concrete deconstruction of the process in terms of its possible steps.  There's
no replacement for a simple example.  Ever since reading the document, I've had pleasant dreams of a
new kind of data-flow machine, new to me anyway, and greater understanding of hardware and software.

These realizations are obvious, at least in hindsight, yet I struggled to reach some of them with no
example to study, and I suppose that's not bad or unnatural.  Regardless, forevermore shall I have a
concrete example of a data-flow machine against which to compare all others, for which I'm thankful.
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