tfix cache bug (Eoghan Sherry) - plan9port - [fork] Plan 9 from user space (HTM) git clone git://src.adamsgaard.dk/plan9port (DIR) Log (DIR) Files (DIR) Refs (DIR) README (DIR) LICENSE --- (DIR) commit 981672ae7e2b4a9c5f0ff27faeb0136c0ecf8bf2 (DIR) parent 1cba594e516aff09e61ec710a8c609385b11b165 (HTM) Author: rsc <devnull@localhost> Date: Sun, 23 Jul 2006 02:36:04 +0000 fix cache bug (Eoghan Sherry) Diffstat: M src/libventi/cache.c | 2 ++ 1 file changed, 2 insertions(+), 0 deletions(-) --- (DIR) diff --git a/src/libventi/cache.c b/src/libventi/cache.c t@@ -510,6 +510,7 @@ if(0)fprint(2, "vtblockput: %d: %x %d %d\n", getpid(), b->addr, c->nheap, b->ios case BioVenti: /*if(b->addr != NilBlock) print("blockput %d\n", b->addr); */ b->used = c->now++; + /* fall through */ case BioVentiError: heapins(b); break; t@@ -541,6 +542,7 @@ vtblockwrite(VtBlock *b) memmove(b->score, score, VtScoreSize); qlock(&c->lk); + b->addr = NilBlock; /* now on venti */ b->iostate = BioVenti; h = (u32int)(score[0]|(score[1]<<8)|(score[2]<<16)|(score[3]<<24)) % c->nhash; b->next = c->hash[h];